As a usual electric power supply device, for instance, a device is known that is disclosed in JP-A-2006-5581 (patent literature 1).
FIG. 9 is a circuit diagram of the device disclosed in the patent literature 1. A circuit shown in FIG. 9 supplies an electric power of a battery to a load such as a lamp or a motor mounted on, for instance, a vehicle to drive the load. In the circuit, a semiconductor element (T101) such as an MOSFET is provided between a load 102 and a battery VB to switch turning on and off of the semiconductor element (T101) so that the load 102 is controlled to be driven and stopped.
A drain (a point P1) of the semiconductor element (T101) is connected to a connector 101. The connector 101 is connected to a positive terminal of the battery VB through a wiring W1 of a power source side. Further, a source (a point P2) of the semiconductor element (T101) is connected to the load through a wiring W2 of a load side.
Here, a resistance of the wiring W1 of the power source side is supposed to be Rw1, an inductance is supposed to be L1, a resistance of the wiring W2 of the load side is supposed to be Rw2 and an inductance is supposed to be L21+L22.
Further, a gate of the semiconductor element (T101) is connected to an output terminal of a driver 104 through a resistance R5. The driver 104 is controlled by a control logic circuit 105. Then, when an input signal switch SW1 is turned on so that a start input terminal of the control logic circuit 105 is grounded, the control logic circuit 105 drives the driver 104 to supply a voltage of a charge pump 103 to the gate of the semiconductor element (T101) and turn on the semiconductor element (T101). Thus, an electric power output from the battery VB is supplied to the load via the semiconductor element (T101).
Further, the point P1 branches to two systems. One branch line is connected to a negative input terminal of a comparator CMP 102, and the other branch line is grounded through a series connecting circuit of resistances R1 and R2. Then, a connecting point P3 (voltage V3) of the resistances R1 and R2 is grounded through a capacitor C1 and connected to a positive input terminal of the comparator CMP 102.
Now, when the wiring W2 of the load side is grounded at a point P4 due to a failure of the short-circuit of the wiring, a short-circuit current is supplied to a path from the battery VB, through the wiring W1 of the power source side, the connector 101, the point P1, the semiconductor element T101, the wiring W2 of the load side (Rw2, L21), the point P4 and a grounding resistance Rw3, to a GND. A drain voltage (a voltage at the point P1) V1 of the semiconductor element (T101) is lowered. Then, the voltage V1 is input to the negative input terminal of the comparator CMP 102. A decided voltage V3 obtained by dividing the voltage V1 before the short-circuit of the wiring occurs (before the point P4 is grounded) by the resistances R1 and R2 is input to the positive input terminal of the comparator CMP 102 so that the voltage V1 (the voltage V1 after the short-circuit of the wiring occurs) is compared with the decided voltage V3 by the comparator CMP 102.
Then, since the decided voltage V3 is changed with a time constant due to the existence of the capacitor C1, the decided voltage V3 hardly changes for a while after the short-circuit of the wiring occurs. Accordingly, at the time of the occurrence of the short-circuit of the wiring, a relation of V1<V3 is established so that an output signal of the comparator CMP 102 is inverted to an H level from an L level. When the inversion of the output signal of the comparator CMP 102 is input to the control logic circuit 105, the control logic circuit 105 grounds an output of the driver 104. As a result, the semiconductor element (T101) is turned off so that the semiconductor element (T101) and the wiring of a load circuit are protected from an over-current due to the short-circuit of the wiring.
Here, an amount of fall of the voltage V1 may be calculated as described below when the short-circuit current is supplied to the inductances L1 and L21 due to the occurrence of the short-circuit of the wiring at the point P4.
Initially, a circuit current is calculated when a voltage is applied to a circuit including an inductance and a resistance. FIG. 10A shows a circuit in which an SW, a resistance R and an inductance L are connected in series and provided between a power source VB and a GND. Assuming that the circuit current obtained when the SW is turned on at t=0 is I,VB=L*dI/dt+R*I I=VB/R{1−Exp(−R/L*t)}dI/dt=VB/L*Exp(−R/L*t)dI/dt|t-0=VB/L 
A current wave form at this time is shown in FIG. 10B. When t=0, I=0[A]. With the elapse of time, the current I exponential functionally increases and converges to a current value VB/R. The gradient dI/dt of the current I at that time is maximum when t=0 and a value thereof is VB/L.
FIG. 10C shows a circuit similar to a load circuit shown in FIG. 9 in which a short-circuit of a wiring occurs between a semiconductor element (T101) and a load. Further, FIG. 10D shows a change of a drain voltage V1 of the semiconductor element (T101) when t=0 and the semiconductor element (T101) is turned on. Assuming that a resistance and an inductance of a wiring of a power source side are R1 and L1, and a resistance and an inductance between the source of the T101 and a GND are R2 and L2, a counter electromotive force E1 generated in the inductance L1 of a power line when t=0 and V1 at that time are expressed as described below.E1=VB*L1/(L1+L2)  (1)V1=VB−E1=VB*L2/(L1+L2)  (2)In the circuit shown in FIG. 9, assuming that a counter electromotive force E1 obtained when the short-circuit of the wiring does not occur in the point P4 and a counter electromotive force E1 obtained when the short-circuit of the wiring occurs in the point P4 are respectively E1a and E1b, they are applied to the equation (1),E1a=VB*L1/(L1+L21+L22+Lz)E1b=VB*L1/(L1+L21)Then, since L22+Lz≠0, E1a<E1b . . . (3) is established.
Namely, when the semiconductor element (T101) is turned on under a state that the wiring W2 of the load side is short-circuited, an amount of drop E1b of the voltage V1 is always larger than an amount of drop E1a obtained when the wiring is normal. Further, as the inductance Lz of the load is larger, a difference between them is the more increased. Accordingly, when the level of the voltage V1 (=VB−E1) is compared with the decided voltage V3, if the decided voltage V3 is set to a value smaller than a voltage “VB−E1a” in a normal state, when “V1<V3” is detected, the wiring W2 of the load side may be decided to be short-circuited. The inductance of the wiring is about 1 [μH/m] and hardly depends on a sectional area of the wiring. Accordingly, in such an extremely dead short-circuit as to have a length of the wiring between P2 and P4 of 0.2 m when the length of the wiring of the power source side is 2 m, the voltage V1 drops to 1/10 as low as a source voltage VB. When VB=12V, V1 drops to V1=1.2V.
Thus, the voltage V1 drops to a level exceeding an in-phase input voltage range of the comparator CMP 102 that compares the voltage V1 with the decided voltage V3. Here, the “in-phase input voltage range” means a voltage located within a range in which an operational amplifier forming the comparator CMP 102 normally operates. When a voltage lower than this range is input, the operation of the comparator CMP 102 is not assured. That is, the comparator CMP 102 may erroneously operate.
On the other hand, the drop of the voltage V1 may occur from other cause than the short-circuit. For instance, in the circuit shown in FIG. 9, an imperfect contact is supposed to occur in a contact of the connector 101 connected to the wiring W1 of the power source side. As a result, a contact resistance of about 1 [mΩ] during a normal time is supposed to increase to 5[0]. At this time, assuming that as a load current ID, a current of 10 A is supplied, a voltage drop may possibly reach 50 V. When the source voltage VB is VB=12V, the voltage V1 is substantially a level of the GND.
As described above, in an over-current protecting device shown in FIG. 9, when the voltage V1 is extremely lowered to become a lower limit of the in-phase input range of the comparator CMP 102 or lower, a problem arises that the comparator CMP 102 does not function. As a countermeasure for the problem, when the voltage V1 is lower than a lower limit of the in-phase input voltage range, the output of the comparator CMP 102 is forcedly inverted so that the semiconductor element (T101) may be controlled to be interrupted. However, in this method, even when a power is instantaneously interrupted due to the imperfect contact of the connector 101 provided in the power source side, the semiconductor element (T101) is interrupted. Thus, when the instantaneously interrupted source voltage is recovered to a normal voltage, a problem arises that the semiconductor element (T101) cannot be reset to a turning on state.    Patent literature 1: JP-A-2006-5581